In the semiconductor industry, it has been suggested to use a through electrode or a through silicon via (TSV) technology for replacing a wire bonding technology. In through electrode technology, an electrode is formed to penetrate a semiconductor substrate. Through electrode techniques can generally be classified as via-last schemes or via-middle schemes. In via-last schemes, a through electrode is formed after forming integrated circuits and metal interconnection lines. In via-middle schemes, a through electrode is formed after forming the integrated circuits but before forming the metal interconnection lines.
Metal interconnection lines may be formed under relatively high temperature conditions. In a via-middle scheme, when this is done after the formation of the through electrode, the resulting thermal stress may lead to an upward expansion or extrusion of the through electrode. This extrusion of the through electrode may undesirably result in a delamination of metal interconnection lines that are in contact with the through electrode or an increase in interfacial resistance between the through electrode and the metal interconnection line.
In order to overcome these technical issues, a through electrode forming process has been describded which includes filling a through electrode hole with an insulating material, forming a metal interconnection line thereon, removing the insulating material from the through electrode hole, and then filling the through electrode hole with a metal layer, as disclosed in Japanese Patent Publication Number 2004-342861. As shown in FIG. 6 of Japanese Patent Publication Number 2004-342861, when the insulating material is removed from the through electrode hole, a portion of the insulating material should be allowed to remain on a sidewall of the through electrode hole in order to electrically isolate the through electrode from the substrate. However, this may lead to additional technical difficulties, such as misalignment of an etch-mask to be additionally formed and/or increasing difficulty in an etching process.